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电机驱动icFAN7888
3 Half-Bridge Gate-Drive IC
Features
Description
. Floating Channel for Bootstrap Operation to +200V
The FAN7888 is a monolithic three half-bridge gate-drive
Typically 350 mA 1 650 mA Sourcing/Sinking Current
IC designed for high-voltage, high-speed driving MOS-
Driving Capability for All Channels
FETs and IGBTs operating up to +200 V.
.3 Half-Bridge Gate Driver
Fairchild's high-voltage process and common-mode
Extended Allowable Negative Vs Swing to -9.8 V for
noise canceling technique provide stable operation of
Signal Propagation at Vgs=15 V
high-side drivers under high-dv/dt noise circumstances.
Matched Propagation Delay Time Maximum: 50 ns
An advanced level-shift circuit allows high-side gate
.3.3 V and 5 V Input Logic Compatible
driver operation up to Vs=-9.8 V (typical) for VBs=15 V.
Built-in Shoot-Through Prevention Circuit for All
The UVLO circuits prevent malfunction when VDD and
Channels with 270 ns Typical Dead Time
VBs are lower than the specified threshold voltage.
Built-in Common Mode dv/dt Noise Canceling Circuit
Output drivers typically source/sink 350 mA 1 650 mA,
Built-in UVLO Functions for All Channels
respectively, which is suitable for three-phase half-bridge
applications in motor drive systems.
Applications
.3-Phase Motor Inverter Driver
20-SOIC
3 Half-Bridge Gate-Drive IC
Features
Description
. Floating Channel for Bootstrap Operation to +200V
The FAN7888 is a monolithic three half-bridge gate-drive
Typically 350 mA 1 650 mA Sourcing/Sinking Current
IC designed for high-voltage, high-speed driving MOS-
Driving Capability for All Channels
FETs and IGBTs operating up to +200 V.
.3 Half-Bridge Gate Driver
Fairchild's high-voltage process and common-mode
Extended Allowable Negative Vs Swing to -9.8 V for
noise canceling technique provide stable operation of
Signal Propagation at Vgs=15 V
high-side drivers under high-dv/dt noise circumstances.
Matched Propagation Delay Time Maximum: 50 ns
An advanced level-shift circuit allows high-side gate
.3.3 V and 5 V Input Logic Compatible
driver operation up to Vs=-9.8 V (typical) for VBs=15 V.
Built-in Shoot-Through Prevention Circuit for All
The UVLO circuits prevent malfunction when VDD and
Channels with 270 ns Typical Dead Time
VBs are lower than the specified threshold voltage.
Built-in Common Mode dv/dt Noise Canceling Circuit
Output drivers typically source/sink 350 mA 1 650 mA,
Built-in UVLO Functions for All Channels
respectively, which is suitable for three-phase half-bridge
applications in motor drive systems.
Applications
.3-Phase Motor Inverter Driver
20-SOIC